Hardware library, Hardware library -1 – Altera SoC Embedded Design Suite User Manual
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Hardware Library
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The Altera SoC FPGA Hardware Library (HWLIB) was created to address the needs of low-level software
programmers who require full access to the configuration and control facilities of SoC FPGA hardware.
An additional purpose of the HWLIB is to mitigate the complexities of managing the operation of a
sophisticated, multi-core application processor and its integration with hardened IP peripheral blocks and
programmable logic in a SoC architecture.
Figure 8-1: HW Library
Within the context of the SoC HW/SW ecosystem, the HWLIB is capable of supporting software develop‐
ment in conjunction with full featured operating systems or standalone bare-metal programming
environments. The relationship of the HWLIB within a complete SoC HW/SW environment is illustrated
in the above figure.
The HWLIB provides a symbolic register abstraction layer known as the SoC Abstraction Layer (SoCAL)
that enables direct access and control of HPS device registers within the address space. This layer is
necessary for enabling several key stakeholders (boot loader developers, driver developers, board support
package developers, debug agent developers, and board bring-up engineers) requiring a precise degree of
access and control of the hardware resources.
The HWLIB also deploys a set of Hardware Manager (HW Manager) APIs that provides more complex
functionality and drivers for higher level use case scenarios.
The HWLIB has been developed as a source code distribution. The intent of this model is to provide a
useful set of out-of-the-box functionality and to serve as a source code reference implementation that a
user can tailor accordingly to meet their target system requirements.
The capabilities of the HWLIB are expected to evolve and expand over time particularly as common use
case patterns become apparent from practical application in actual systems.
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