Altera SoC Embedded Design Suite User Manual
Page 193
Table 9-1: HPS Flash Programmer Parameters
Option
Short
Option
Required
Description
--cable
-c
Yes
This option specifies what download cable to
use.
To obtain the list of programming cables, run
the command "jtagconfig". It will list the
available cables, like in the following example:
jtagconfig
1) USB-Blaster [USB-0]
2) USB-Blaster [USB-1]
3) USB-Blaster [USB-2]
The "-c" parameter can be the number of the
programming cable, or its name. The
following are valid examples for the above
case:
-c 1
-c "USB-Blaster [USB-2]"
--device
-d
Yes (if there are
multiple HPS
devices in the
chain)
This option specifies the index of the HPS
device. The tool will automatically detect the
chain and determine the position of the HPS
device; however, if there are multiple HPS
devices in the chain, the targeted device index
must be specified.
ug-1137
2014.12.15
HPS Flash Programmer
9-3
HPS Flash Programmer User Guide
Altera Corporation
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)