Altera SoC Embedded Design Suite User Manual
Page 107
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Figure 4-61: Target Files
Running the Linux Application Debugging Sample Application
At this stage, we have a compiled Linux application and a properly configured Remote Systems
Connection. This section shows how to create a Debugger Configuration and use it to run and debug the
application.
1. Select Run > Debug Configurations… to open the Debug Configurations dialog box.
2. Right click the DS-5 Debugger and click New to create a new debug configuration.
3. Name the newly created debugger configuration, LinuxAppDebug_DevKit, by editing its name in the
Connection tab.
4. In the Connection tab, select:
a. For the Free Web Edition license, select Generic > gdb server > Linux Application Debug >
Download and Debug Application.
b. For the Subscription Edition or 30-day Evaluation Edition, select Altera > Cyclone 5 SoC > Linux
Application Debug > Download and Debug Application.
5. In the Connection tab, select the newly created RSE connection and keep the default values.
4-88
Running the Linux Application Debugging Sample Application
ug-1137
2014.12.15
Altera Corporation
Getting Started Guides
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
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- GPIO (22 pages)
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- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (224 pages)
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- FFT MegaCore Function (50 pages)
- DDR2 SDRAM High-Performance Controllers and ALTMEMPHY IP (140 pages)
- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
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- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
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