HID Hi-O iCLASS Installation Guide - Manual (Page 23)

iCLASS OEM75 Integration Guide, 3141-907, Rev. B.0
January 2014 Page 23 of 49
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6 Firmware
6.1 Applications
The OEM75 has different firmware applications available. Some examples include reading an
iCLASS, and MIFARE, or Ultra Low Power mode.
6.2 Feature Bundles and Configuration
A combination of applications and hardware options can be combined into a bundle. Currently
supported bundles are iCLASS, MIFARE, iCLASS + PIV II, or MIFARE + PIV II.
For a given bundle, there are unique customized configuration options available. See the
How to
Order Guide > iCLASS OEM75 Module Part Numbers > Optional Config Suffix column. To
request a custom configuration contact HID Connect.
6.3 Updates
The OEM has the ability to update firmware through the serial interface and a utility, or a smart card
provided by HID using encrypted firmware files.
Contact HID Technical Support for information regarding field upgrades of readers.
6.4 Communication
Read only and Read/Write communications can be established with the OEM75 module. SPI,
UART or I 2 C communication ports enable a host to send serial commands and accept responses or
data from the OEM75. The Wiegand output port is from the reader to the host.
6.5 SPI Implementation
If I²C communications have been enabled, present the SPI_ENABLE configuration card to the
OEM75 in order to switch to SPI communications.
For the OEM75 product, use the Serial Peripheral Interface (SPI) as the underlying protocol for
message transfers. SPI is a full duplex master/slave serial data link. The master uses four logic
signals to control the data frame and slave device selection. The four logic signals are SCLK
(clock), MOSI (master output, slave input), MISO (master input, slave output), and SS (slave
select).
The OEM75 processor is the SPI slave. Any host communicating with the OEM75 must operate as
an SPI master. Four industry defined standard modes of operation for SPI exist. The OEM75
platform uses Mode 3. For a complete description of Mode 3 SPI communications including clock
polarity and data edge activity, see the following URL:
http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus .
In summary, the SPI on the OEM75 platform functions as follows:
• Input data sampled at the middle of data output time
• Transmit occurs on transition from Idle to active clock state
• Idle state for clock is a high level