HID Hi-O iCLASS Installation Guide - Manual (Page 10)

iCLASS OEM75 Integration Guide, 3141-907, Rev. B.0
Page 10 of 49 January 2014
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presented in order to recover from potential errors. It must be kept in mind that a similar set of state
machines apply to the communication from the OEM75 to the host computer. The protocol
operating in the OEM75 expects the delay between the stop bit of the preceding byte and the start
bit of the next byte to be less than 500 milliseconds. This implies that a complete APDU is
transmitted.
Let us now take into account the potential of sending the packet over an extended distance. Let us
assume a maximum packet size of 263 bytes. For the most basic UART transmission at 57.6 Kbps
with 2 stop bits and even parity. The recommended length of cable for proper operation is no longer
than 50 feet and smaller lengths are specified for higher speed connections. The speed of an
electrical signal is approximately 3 nsecs. per foot. A signal change on one end of the cable will be
recognized approximately 3 nsecs/ft. *50 ft = 150 nsecs later on the other end of the cable. The bit
time, that is the time to generate a bit is 1.0 / 57.6 Kbps = 17.36 microseconds per bit. Since this
time is much greater than the transmission time of any change we can effectively ignore the transit
time or the time it takes an electron to move from the source side to the destination side. The time it
takes to transmit an entire byte including the start, stop and parity bits is then just 12 * 17.36
microseconds = 208 microseconds per byte. The time it takes to transmit a maximum length APDU
is 208 * 263 = 54.79 milliseconds. The time to transmit back a 2 byte status is 416 microseconds, or
0.000416 milliseconds. If we assume no processing delays in the OEM75 the time from
transmission to complete reception of an acknowledgement is then 55.206 milliseconds. The above
analysis indicates that any timeout value used must be at least this large independent of the time it
takes to process a command. The time it takes to execute each of the commands is command
dependent.
This protocol cannot recover from multiple bit errors. A single bit error per byte can be detected, in
which case either the host or the reader should ignore the entire message. A timeout should occur
and the communication can be re-initiated. It is possible for an APDU to be corrupted when
transmitting it to the OEM75 if the unit is connected to the host by means of a very long cable and
that cable is routed near sources of electromagnetic interference. It is possible with the above
conditions that bit corruption modifies the command field of an APDU resulting in an invalid
execution. It is not recommended that the OEM75 be operated in this manner. In the scenarios
depicted in section 2 of this document, the serial cable had a length of 6 feet.
Ultra-Low power applications must create a host interface which recognizes the CP (Card Present)
signal generated by the constantly energized processor receiving antenna signals. This signal has a
dual purpose, it is used not only to indicate a Card Present Event to the Host Processor but it also
wakes up the OEM75 main processor. The host interface must keep in mind that the OEM75 main
processor requires some time to power up and initialize before it can respond to either card or host
requests. It is recommended that the CP signal be used as an interrupt signal to the Host
processor. The Host processor should respond to this interrupt by setting a flag indicating that the
CP event has been recognized and then return to the main processing task which should use the
flag as an indication that Card Data needs to be read from the OEM75. The Host Application should
delay a set period of time allowing the OEM75 main processor time to wake-up and initialize itself.
After this time period the Host can request the card information.