IEI Integration IMB-Q354 v1.00 - Manual (Page 56)

IMB-Q354 uATX Motherboard
Page 34
2.8.3.1 Super I/O LPC Interface
The LPC interface on the Super I/O complies with the Intel
®
Low Pin Count Specification
Rev. 1.0. The LPC interface supports both LDRQ# and SERIRQ protocols as well as PCI
PME# interfaces.
2.8.3.2 Super I/O 16C550 UARTs
The onboard Super I/O has two integrated 16C550 UARTs that can support the following:
one standard serial port (COM1)
IrDa 1.0 and ASKIR protocols(IR1)
The Fintek F81216DG LPC Serial Port chipset connected to the LPC bus provided
connectivity to another three serial port connectors (COM2, COM3 and COM4). For
further details on the Fintek F81216DG serial port controller, please refer to Section 2.8.4.
2.8.3.3 Super I/O Enhanced Hardware Monitor
The Super I/O Enhanced Hardware Monitor monitors three thermal inputs, VBAT
internally, and eight voltage monitor inputs. These hardware parameters are reported in
the BIOS and can be read from the BIOS Hardware Health Configuration menu.
2.8.3.4 Super I/O Floppy Disk Drive (FDD) Controller
The Super I/O FDD controller is compatible with the following specifications.
Enhanced digital data separator
Supports automatic write protection via software
Supported capacities:
o 360K
o 720K
o 1.2M
o 1.44M
o 2.88M
3-mode FDD supported