Rainbow Electronics AT73C246 - Manual (Page 68)

68
11050A–PMAAC–07-Apr-10
AT73C246
12.6.5 Timing Specifications
Figure 12-10. Timing Diagram of data interface (I²S Mode)
12.7 Digital Filters Transfer Function
12.7.1 DAC Frequency Response
The following diagrams are referred to FS = 1 (Sampling Frequency).
Figure 12-11. DAC Type 0 Frequency Response
LSB LSB MSB MSB LSB
LRFS
BCLK
DAI
DAO V XL
V XH
V IL
V IH
V IL
V IH
Word N-1
Right Channel
Word N
Left Channel
Word N
Right Channel
T LRCLK
T BCLK
T HSDX
T LSDX
T LRCLK
Table 12-4. Digital Audio InterfaceTiming Specifications
Parameter Symbols Min Typ Max Unit
Left/Right Word Cycle Time T
LRCLK
1 / (2 x F
S
) s
Bit Clock Period T
BCLK
T
MCLK
/ 2 s
BCLK Posedge to {DAI, DAO and LRFS} Change
Hold Time
T
HSDX
5 ns
{DAI, DAO and LRFS} Change to BCLK
Posedge Setup Time
T
LSDX
5 ns
Overall Ripple