Rainbow Electronics AT73C246 - Manual (Page 38)

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11050A–PMAAC–07-Apr-10
AT73C246
At power up, LDO3 an LDO4 default output voltages are both 3.3V. For different default output
voltages, please contact Atmel.
11.8 Power Fail Detectors
AT73C246 features a Power Fail detector on each CPU supplies (V
DD0
, V
DD1
, V
DD2
, V
DD3
). This
function is made of a comparator that toggles each time one the listed power supplies goes
below a defined threshold. The comparator toggling is considered by the PMU digital state
machine as a POWER-FAIL event.
The threshold value of the power fail detector is proportional to the output voltage of the regula-
tor. It is not a fixed voltage, it is adapted to the programmed output voltage. The default
threshold value is set according to register PMU_RST_LVL (0x05) and can be programmed to
another value through TWI access. For other default threshold values at startup, please contact
Atmel.
11.9 Measurement Bridge and 10-bit ADC
AT73C246 features a 10-channel measurement chain including:
• A multiplexer + attenuator followed by a unity gain buffer
• A 300kS/s 10-bit SAR ADC.
ADC function is enabled through the register ADC_CTRL (0x30). ADC_MUX_1 (0x31) and
ADC_MUX_2 (0x32) allow the selection of inputs to be measured. 1 to 10 inputs can be
selected. The ADC will then perform serial conversion on these inputs and write the correspond-
ing result in registers 0x33 to 0x49.
2 sampling modes are provided to perform periodic conversions:
• Max speed
• Low speed.
To enter these modes, refer to the sampling period bits (TS) in the register ADC_CTRL (0x30).
When MAX_SPEED mode is selected, the ADC runs at 300kS/s and loop without any dead time
over the selected inputs. When a LOW_SPEED sampling period is selected, the ADC performs
a set of input conversions (1 to 10) at 300kS/s and then wait for one sampling period (defined by
TS bits) to start another set of conversions.