Rainbow Electronics AT73C246 - Manual (Page 37)

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11050A–PMAAC–07-Apr-10
AT73C246
11.6 LDO2 Functional Description
LDO2 is a linear voltage regulator intended to supply CPU core voltages in the range 0.8V to
1.35V. Its maximum input voltage is 3.6V. Thus, it must not be wired to the VIN plane with VIN-
SYS, VIN0, VIN1, VIN3 and VIN4 if VIN is above 3.6V. Considering its low-output voltage and
for the sake of efficiency and power dissipation, the user may connect it at the output of DCDC0.
This LDO features:
• A soft start circuit,
• A software programmable output voltage between 0.8 and 1.35V with automatic ramping for
DVS application.
11.6.1 Soft-start Circuit
LDO2 features a soft start circuit to prevent high input current while charging the output capaci-
tor from 0V to the default output voltage. This soft start circuit limits the input current during 5ms
(+/-5%) at startup to 200mA in typical conditions. After this delay, LDO2 recovers full current
capability.
11.6.2 Output Voltage Programming
LDO2 output voltage can be managed through software control in register VDD2_CTRL (0x08).
50mV steps are provided from 0.8V to 1.35V. It is recommended to use the automatic ramping
function in register PMU_SUPPLY_CTRL (0x04) to achieve smooth operation. When the
DVS_VDD2 bit is active (default mode), output voltages are ramped from the current value to
the final value in 50mV / 600us steps.
At power up, LDO2 default output voltage is 1V. For different default output voltage, please con-
tact Atmel.
11.7 LDO3 and LDO4 Functional Description
LDO3 and LDO4 are low dropout linear voltage regulators intended to supply CPU peripherals
(I/Os, analog functions) in the range 2.7V to 3.6V. They can be operated directly from a 5.5V
maximum input voltage. They feature:
• A soft start circuit,
• A software programmable output between 2.7V and 3.6V voltage with automatic ramping for
DVS application,
11.7.1 Soft-start Circuit
LDO3 and LDO4 feature a soft start circuit to prevent high input current while charging the out-
put capacitor from 0V to the default output voltage. This soft start circuit limits the input current
during 5ms (+/-5%) at startup to 200mA in typical conditions. After this delay, LDO3(4) recovers
full current capability.
11.7.2 Output Voltage Programming
LDO3 and LDO4 output voltages can be managed through software control in registers
VDD3_CTRL (0x09) and VDD4_CTRL (0x0A). 50mV steps are provided from 2.7V to 3.6V. It is
recommended to use the automatic ramping function in register PMU_SUPPLY_CTRL (0x04) to
achieve smooth operation. When the DVS_VDD
{3,4}
bit is active (default mode), output voltages
are ramped from the current value to the final value in 50mV / 600us steps.