Rainbow Electronics ATtiny26L - Manual (Page 33)

33
ATtiny26(L)
1477B–AVR–04/02
High Frequency PLL Clock –
PLL
CLK
There is an internal PLL that provides nominally 64 MHz clock rate locked to the RC
Oscillator for the use of the Peripheral Timer/Counter1 and for the system clock source.
When selected as a system clock source, by programming (“0”) the fuse PLLCK, it is
divided by four. When this option is used, the CKSEL3..0 must be set to “0001”. This
clocking option can be used only when operating between 4.5 - 5.5V. When using this
clock option, start-up times are determined by the SUT Fuses as shown in Table 16.
See also “PCK Clocking System” on page 26.
MCU Status Register –
MCUSR
• Bit 7..4 – Res: Reserved Bits
These bits are reserved bits in the ATtiny26/L and always read as zero.
• Bit 3 – WDRF: Watchdog Reset Flag
This bit is set (one) if a Watchdog Reset occurs. The bit is reset (zero) by a Power-on
Reset, or by writing a logic zero to the flag.
• Bit 2 – BORF: Brown-out Reset Flag
This bit is set (one) if a Brown-out Reset occurs. The bit is reset (zero) by a Power-on
Reset, or by writing a logic zero to the flag.
• Bit 1 – EXTRF: External Reset Flag
This bit is set (one) if an External Reset occurs. The bit is reset (zero) by a Power-on
Reset, or by writing a logic zero to the flag.
• Bit 0 – PORF: Power-on Reset Flag
This bit is set (one) if a Power-on Reset occurs. The bit is reset (zero) by writing a logic
zero to the flag.
To make use of the reset flags to identify a reset condition, the user should read and
then reset (zero) the MCUSR as early as possible in the program. If the register is
cleared before another reset occurs, the source of the reset can be found by examining
the reset flags.
Table 16. Start-up Times for the PLLCK
SUT1..0
Start-up Time from
Power-down
Additional Delay from
Reset (V
CC
= 5.0V) Recommended Usage
00 1K CK – BOD enabled
01 1K CK 4.1 ms Fast rising power
10 1K CK 65 ms Slowly rising power
11 16K CK – Slowly rising power
Bit 7 6 5 4 3 2 1 0
$34 ($54) – – – – WDRF BORF EXTRF PORF MCUSR
Read/Write R R R R R/W R/W R/W R/W
Initial Value 0 0 0 0 See Bit Description