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Table 46 r, Attiny26(l) – Rainbow Electronics ATtiny26L User Manual

Page 104

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104

ATtiny26(L)

1477B–AVR–04/02

Notes:

1. Enabling of the Timer/Counter1 Compare match outputs and Timer/Counter1 PWM Outputs OC1A/OC1B and OC1A/OC1B

are described in the section “8-bit Timer/Counter1” on page 47.

2. Note that the PCINT0 Interrupt is only enabled if both the Global Interrupt Flag is enabled, the PCIE0 flag in GIMSK is set

and the alternate function of the pin is disabled as described in “Pin Change Interrupt” on page 38.

3. The Two-wire and Three-wire USI-modes are described in “Universal Serial Interface – USI” on page 63.
4. Shift clock (SCL) hold for USI is in described “Universal Serial Interface – USI” on page 63.
5. USI start up interrupt is enabled if both the Global Interrupt Flag is enabled and the USISIE flag in the USICR Register is set

as described in “Universal Serial Interface – USI” on page 63.

6. Data Output (DO) is valid in USI Three-wire mode and the operation is described in “Universal Serial Interface – USI” on

page 63.

7. Operation of the data pin SDA in USI Two-wire mode and DI in USI Three-wire mode in “Universal Serial Interface – USI” on

page 63.

8. Not operator is marked with “~”.

Table 46. Overriding Signals for Alternate Functions in PB3..PB0

Signal Name

PB3/OC1B/PCINT0

PB2/SCK/SCL/OC1B/PCI
NT0

PB1/DO/OC1A/PCINT0

PB0/DI/SDA/OC1A

PUOE

0

USI_TWO-WIRE

(3)

0

USI_TWO-WIRE

(3)

PUOV

0

0

0

0

DDOE

0

USI_TWO-WIRE

(3)

0

USI_TWO-WIRE

(3)

DDOV

0

(USI_SCL_HOLD

(4)

|

~

(8)

PORTB2) • DDB2

0

(~SDA | ~PORTB0) •
DDB0

PVOE

OC1B_ENABLE

(1)

USI_TWO-WIRE

(3)

DDB2 | OC1B_ENABLE

(1)

USI_THREE-WIRE

(3)

|

OC1A_ENABLE

(1)

USI_TWO-WIRE

(3)

DDB0

|

OC1A_ENABLE

(1)

PVOV

OC1B

~(USI_TWO-WIRE •
DDB2) • OC1B

USI_THREE-WIRE

(3)

DO

(6)

| ~USI_THREE-

WIRE • OC1A_ENABLE

(1)

• OC1A

~(USI_TWO-WIRE•
DDB0) •
OC1A_ENABLE

(1)

• OC1A

DIEOE

PCINT0_ENABLE

(2)

~OC1B_ENABLE

(1)

~(USI_TWO-WIRE |

USI_THREE-WIRE |

OC1B_ENABLE) •

PCINT0_ENABLE

(2)

|

USI_START_I.ENABLE

(5)

~(USI_THREE-WIRE |

OC1A_ENABLE) •

PCINT0_ENABLE

(2)

~(USI_TWO-WIRE

(3)

|

USI_THREE-WIRE

(3)

|

OC1A_ENABLE

(1)

)

PCINT0_ENABLE

(2)

|

USI_START_I.ENABLE

(5)

DIEOV

1

1

1

1

DI

PCINT0

PCINT0, SCL, SCK

PCINT0

PCINT0, SDA

AIO