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Master latency timer submenu, Bios setup 4-37, Figure 4-14. master latency timer submenu – NEC 1080Xd User Manual

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BIOS Setup 4-37

Master Latency Timer Submenu

When you select “Master Latency Timer” on the HBB Configuration submenu,
the following screen appears. For more information on the option functions, refer to
“Table 4-16 Master Latency Timer Submenu.”

H BB BU S (W/X/Y/Z) Loca t ion Tim er

------ ----- ------------ ---------- ----------------

#0 0 (0/0/0/0) [00/000/81C] [00]

#1 1 (0/0/0/1) [00/000/81C] [00]

#2 2 (0/0/1/0) [00/000/81D] [00]

#3 3 (0/0/1/1) [00/000/81D] [00]

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

#8 N /A (-/-/0/0) N /A [00]

#9 N /A (-/-/0/1) N /A [00]

#10 N /A (-/-/1/0) N /A [00]

#11 N /A (-/-/1/1) N /A [00]

It em Specific H elp

Select t h e

Ma st er La t en cy Tim er.

H BB:H ost Bu s Br idge

W:Cell N u m ber (0-7)

X:IOC N u m ber (0-1)

Y:GSL N u m ber (0-1)

Z:P CI Bu s (0-1)

(0:P CI#0

1:P CI#1)

Loca t ion : (a a /bbb/ccc)

a a :Ca bin et Nu m ber

bbb:Ra ck -Mou n t a ble

U n it In for m a t ion

ccc:U n it N u m ber

F 1 H elp ^ v Select It em - / + Ch a n ge Va lu es F 9 Set u p Defa u lt s

E sc E xit < > Select Men u E n t er Select Su b-Men u F 10 Sa ve a n d E xit

P h oen ixBIOS Set u p U t ilit y

Syst em H a r dwa r e

Ma st er La t en cy Tim er :

Figure 4-14. Master Latency Timer Submenu