Intel NetStructure MPCBL0001 - Manual (Page 47)

Technical Product Specification 47
Order #273817
Intel NetStructure
®
MPCBL0001 High Performance Single Board Computer
Contents
When the firmware is commanded to enter firmware (FW) update mode, the operational code uses
a special branch, Software Interrupt, to jump to the FW update code in the boot block. Once in FW
update mode, the update code is copied into RAM, then the firmware jumps to the code in RAM to
execute. The FW update code cannot execute out of flash while the flash is being updated.
3.6 IPMC Firmware Upgrade Procedure
MPCBL0001 firmware is upgraded using either of two methods, the KCS interface or the IPMB
(RMCP) interface.
3.6.1 IPMC Firmware Upgrade Using KCS Interface
The KCS interface is the communication mechanism between the host processor on the
MPCBL0001 and the IPMC controller. A firmware update utility is available. It takes a hex file to
be updated as input from the command line. It can also verify that updates are completed
successfully by reading back data written to the flash memory. Typically, it takes the utility around
two minutes to complete the update over the KCS interface. After the firmware update is
Figure 4. IPMC Firmware Code Process
B3525-01
No
No
Copy Update
Code to RAM
Yes
Yes
Force
Update
Bit Set?
FW
Update
Command
IPMC in Reset
FW Update
Mode
IPMC Boot Block
Main IPMC Code
RAM
IPMC
Self-test
Self-test
Failed?
IPMC
Operational