Freescale Semiconductor MC68HC908MR32 - Manual (Page 249)

I/O Registers
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Freescale Semiconductor 249
NOTE
When TOVx is set, a TIMB counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
When the TOVx is 1 and clear output on compare is selected, setting the CHxMAX bit forces the duty
cycle of buffered and unbuffered PWM signals to 100 percent. As
Figure 17-9 shows, CHxMAX bit
takes effect in the cycle after it is set or cleared. The output stays at 100 percent duty cycle level until
the cycle after CHxMAX is cleared.
Figure 17-9. CHxMAX Latency
Table 17-2. Mode, Edge, and Level Selection
MSxB:MSxA ELSxB:ELSxA Mode Configuration
X0 00
Output preset
Pin under port control; initialize timer output level high
X1 00 Pin under port control; initialize timer output level low
00 01
Input capture
Capture on rising edge only
00 10 Capture on falling edge only
00 11 Capture on rising or falling edge
01 00
Output compare
or PWM
Softare compare only
01 01 Toggle output on compare
01 10 Clear output on compare
01 11 Set output on compare
1X 01 Buffered output
compare
or buffered
PWM
Toggle output on compare
1X 10 Clear output on compare
1X 11 Set output on compare
OUTPUT
OVERFLOW
PTEx/TCHx
PERIOD
CHxMAX
OVERFLOW OVERFLOW OVERFLOW OVERFLOW
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
TOVx