Hitachi L100 - Manual (Page 110)

L100 Inverter
Oper
at
ions
and Monit
o
ring
4–19
Frequency Arrival Signal
Frequency Arrival [FA1] and [FA2] signals indicate when the output frequency acceler-
ates or decelerates to arrive at a constant frequency. Refer to the figure below. Frequency
Arrival [FA1] (left graph) turns on when the output frequency gets within 0.5 Hz below
or 1.5 Hz above the target constant frequency. The timing is modified by a small 60 ms
delay. Note the active low nature of the signal, due to the open collector output.
Frequency Arrival [FA2] (right graph) uses thresholds for acceleration and deceleration
to provide more timing flexibility than [FA1]. Parameter C42 sets the arrival frequency
threshold for acceleration, and parameter C43 sets the threshold for deceleration. This
signal also is active low and has a 60 ms delay after the frequency thresholds are crossed.
F01
FA1
signal
0
0.5 Hz
set value
60 ms 60 ms
ON ON
0.5 Hz
1.5 Hz
Output
frequency
Hz
FA2
signal
0
0.5 Hz
ON
1.5 Hz
Output
frequency
Hz
C42
C43
time time
accel.
decel.
Thresholds
1.5 Hz
F01
set value
Option
Code
Terminal
Symbol
Function Name
Output
State
Description
01 FA1 Frequency arrival
type 1 signal ON when output to motor is at the set frequency
OFF when output to motor is off, or in any accelera-
tion or deceleration ramp
02 FA2 Frequency arrival
type 2 signal ON when output to motor is at or above the set fre-
quency thresholds for, even if in acceleration or
deceleration ramps
OFF when output to motor is off, or during accelera-
tion or deceleration before the respective thresh-
olds are crossed
Valid for outputs: 11, 12, AL0 – AL2
Required settings: (none)
Notes:
•
At the time of acceleration, an output signal at a
frequency between the set frequency - 0.5 Hz to
+ 1.5 Hz is turned on.
• At the time of deceleration, an output signal at a
frequency between the set frequency + 0.5 Hz to
-1.5 Hz is turned on.
• The delay time of the output signal is 60 ms
(nominal).
CM2 11 12 FM H OI O L
Example:
FA2
RY
+
–
Inverter output
terminal circuit
FA1
RY
See I/O specs on page 4–5.
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