Epson 4003353 - Manual (Page 52)

2.3.2.7 D-RAM Refreshment Controller
The H8 CPU is with a the refresh controller into the internal This CPU can
contact the 16-bit D-RAM which is a 2 type. The fallowing table lists the
method between the H8 CPU and the 2
Table 2-10. Junction Method DRAM)
CPU 2 D-RAM
*
The method of the D-RAM is only
following figure shows the timing of each cycle.
AS
I
I Read Cycle
used to the cycle method. The
I
Write Cycle
. . . . . . . . . . . . . . . . . . . . . .
I
1 J
(Read Write Cycle)
Figure 2-27. D-RAM Cycle Timings
(Refresh Cycle)
CPU H8 (ICI) D-RAM
79 28
LWR ,
7 8 —
2 7 +
O E
I J
Figure 2-28. Junction Method (CPU-DRAM)
2-22 Rev. A