KEPCO KLP Series Developers Guide, Rev 3 - Manual (Page 105)

KLP 041213
A-5
FIGURE A-1. GPIB COMMANDS
A.13 *SRE — SERVICE REQUEST ENABLE COMMAND
*SRE
Syntax: *SRE where = value from 0 - 255 per Table A-3, except bit 6 cannot be pro-
grammed.
Description: Sets the condition of the Service Request Enable register. The Service Request Enable regis-
ter determines which events of the Status Byte Register are summed into the MSS (Master
Status Summary) and RQS (Request for Service) bits. RQS is the service request bit that is
cleared by a serial poll, while MSS is not cleared when read. A “1” (1 = set = enable, 0 =
reset = disable) in any Service Request Enable register bit position enables the correspond-
ing Status Byte bit to set the RQS and MSS bits. All the enabled Service Request Enable
register bits then are logically ORed to cause Bit 6 of the Status Byte Register (MSS/RQS)
to be set. Related Commands: *SRE?, *STB?. (See example, Figure A-1.)
NOTE: The following example assumes KLP 75-33-1200 with virtual model set for 36V, 33.33A and out-
put operating in voltage stabilization mode.
*CLS Clears data from all status registers.
*ESE 60 Enables bits 5 (command error), 4 (execution error), 3 (device dependent
error) and 2 (query error) (see Table A-1) to set the event status sum-
mary bit when an STB command is executed.
*ESE? Returns 60 (value of mask) verifying that bits 5,4,3 and 2 are enabled.
*ES Invalid command; this will set error bit 5 (command error).
*ESR? Returns 32 (bit 5 set), indicating command error has occurred since the
last time the register was read.
*IDN? Returns: “KEPCO, KLP 75-33-1200, mm-dd-yyyy, Axxxxxx, Vx.xx" where
mm-dd-yyyy indicates date of last calibration, Axxxxxx indicates unit
serial number and Vx.xx indicates firmware revision.
*OPC Directs status bit 0 to be set once pending operations are completed.
OUTP ON Enables output. NOTE: *RST and power-up condition is output off.
VOLT 35;CURR 30 Sets output voltage to 35V, current limit to 30A.
*ESR? Returns 129, indicating 128 (PON, bit 7 = 1) + 1 (OPC, bit 1 = 1).
*ESR? Returns 0 (event status register cleared by prior reading).
VOLT 41.5;CURR 21.5 Sets output voltage to 41.5V, current limit to 21.5A.
*OPC Returns 1 once command operations are completed.
*RST Resets power supply to output off (zero volts, minimum current).
OUTP ON Enables output.
*SRE 40 Enables bits 5 (event status byte summary) and 3 (questionable status
summary) (see Table A-3) to set the request for service bit.
*SRE? Returns 40 (value of mask) indicating bits 5 and 3 are enabled.
*STB? Returns the value of the status byte register, including bit 6 (master sta-
tus summary), without clearing the register; for example, a response of
96 would indicate 64 (MSS, bit 6 =1) + 32 (ESB, bit 5 = 1) have been set.
A return of 00 indicates no bits have been set.
VOLT 25 Sets output voltage to 25V; since output current has not been set, current
limit defaults to the model minimum of 0.4A.
*TST? Power supply executes self test of digital controls and responds with 0 if
test is completed successfully, 1 if test fails.