Sundance SMT943 - Manual (Page 51)

User Manual SMT943 Page 51 of 54 Last Edited: 23/08/2011 17:24:00
DAC Chcd Phase shift 0x50
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
1 Reserved Phase shift
sign
Default ‘0000000’ ‘0’
0 Phase shift
Default ‘00000000’
DAC Chcd Phase shift 0x50
Setting Bit 7:0 Description Phase shift value
0 The phase shift is a value between 0 and 255
Setting Bit 8 Description – Phase shift value
0 ‘0’ Positive phase shift.
1 ‘1’ Negative phase shift.
The DCM used is configured into the mode VARIABLE_CENTER.
4 Pictures of the board
4.1 Top View