beautypg.com

Dac chcd register 7 0x47, Dac chcd register 8 0x48, Dac chcd register 9 0x49 – Sundance SMT943 User Manual

Page 46

background image

User Manual SMT943

Page 46 of 54

Last Edited: 23/08/2011 17:24:00

DAC chcd Register 7 0x47.

DAC chcd Register 7 0x47

Byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

1

Qmc offset a [7:0]

Default

‘00000000

0

Qmc Phase[9:8]

Qmc gain a[10:8]

Qmc gain b[10:8]

Default

‘00’

‘100’

‘100’


DAC chcd Register 7 0x47

Setting

Bit 15:8

Description QMC offset a[7:0]

0

0

Setting

Bit 2:0

Description QMC gain b[10:8]

0

0

Setting

Bit 5:3

Description QMC gain a[10:8]

0

0

Setting

Bit 7:6

Description QMC Phase[9:8]

0

0


DAC chcd Register 8 0x48.

DAC chcd Register 8 0x48

Byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

1

Qmc offset a[12:8]

Reserved

Default

‘00000’

‘000’

0

Qmc offset b [7:0]

Default

‘00000000


DAC chcd Register 8 0x48

Setting

Bit 7:0

Description QMC offset b[7:0]

0

0

Setting

Bit 15:11

Description QMC offset a[12:8]

0

0


DAC chcd Register 9 0x49.

DAC chcd Register 9 0x49

Byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

1

Ser_dac_data[7:0]

Default

‘00000000’

0

Qmc offset b[12:8]

Reserved