Measurement Computing Digital488/80A - Manual (Page 36)

Clear (Pin 41)
The Clear output can be pulsed for approximately 50 microseconds after a Device Clear ( DCL ), Selected
Device Clear ( SDC ), or Interface Clear ( IFC ) command has been sent on the bus, determined by the Form
( F ) mode of each channel. Execution of an SDC to either channel or a DCL affects both channels.
effect depends o
at
The
n whether either channel is in the High Speed Binary ( F5 ) mode. If in the F5 mode, the
SCII
both
ot pulsed. If neither channel is in the F5 mode, an SDC DCL returns
ls to their power-up configuration and pulses both Clear lines for approximately 50
s.
The Clear line is normally active high. The Invert ( I ) command programs it active low ( I8 ). The
Handshake ( H ) command can pulse the Clear line of either channel ( H0 ), independent of any I/O
operations.
Data Strobe (Pin 42)
channels in this mode have their command interpreter re-enabled and then they are returned to the A
Hexadecimal (
F0 ) mode. All other parameters remain unchanged. In addition, the Clear lines on
channels are n to either channel or a
both channe
microsecond
The Data Strobe output is pulsed for approximately 50 microseconds after new data are output on the I/O
port. The Data Strobe line is normally active high, but
ay be programmed active low ( I4 ) by the Invert
O
.
Trigger (Pin
m
( I ) command. The Handshake ( H ) command can pulse the Data Strobe line ( H1 ), independent of any I/
operations. The Data Strobe output is not pulsed when Bit Set ( A ) or Bit Clear ( B ) commands are executed
43)
The Trigger output is pulsed for approximately 50 microseconds after a Group Execute Trigger ( GET )
command is received from the bus controller. The trigger pulse is normally active high, but can be made
active low (
I2 ) with the Invert ( I ) command. The Handshake ( H ) command can independently pulse the
Trigger line ( H2 ), independent of any bus activity.
30 Digital488/80A Operation Digital488/80A User's Manual