Comtech EF Data SDM-309B - Manual (Page 155)

Maintenance SDM-309B Satellite Modem
6-6–10 MN/U-SDM309B Rev. #
6.1.4.3 Viterbi Decoder/demod Card AS/0701 (Figure 6-7)
TP1 Data Clock. Result of the data clock recovery loop in the demod processor Section.
TP2 R0C Sign Bit. Result of the hard decision interface.
50% duty cycle random TTL data.
TP3 R1C Sign Bit. Result of the hard decision interface.
50% duty cycle random TTL data.
TP4 Symbol Clock. Result of the symbol clock recovery loop in the demod processor
Section.
TP5 Not used at this time.
TP6 Not used at this time.
TPG Ground Test Point.
TP7 Sync Change out. Result of Viterbi decoder initiating ambiguity resolution change.
TP8 Decoder Synchronization. Result of the Viterbi decoder achieving synchronization.
TP9 Decoder Data. Data out of the decoder.
TP10 Decoder Clock. Clock out of the decoder.
TP11 Decoder Lock. Result of the decoder and clock synchronization and AGC leveling.
Figure 6-7