Junger Audio D*AP4 FLX / D*AP4 LM Edition - Manual (Page 10)

D*AP4
5
Block Diagram
The above schematic shows the principal blocks of the D*AP4.
The core of the unit is the audio processor with 4 inputs and 4 outputs.
An AES I/O on the motherboard is provided for digital line operation. The respective connectors have relay
bypass for power fail operation. The bypass ciruit may be disabled by an internal jumper. For the 2 channel
version only one AES I/O is fitted.
An interface slot is provided to carry optional 3G / HD / SD-SDI, AES I/O or even analog expansion modules.
It allows for extremely flexible interfacing of the D*AP4 in TV installations.
The sync. circuit can deal with all formats to integrate the D*AP4 into digital facilities with a sample rate from
44.1 to 96kHz. Other devices may be synchronized by the word clock output of the D*AP4.
The D*AP4 has 8 balanced GPIs and 8 relay closure GPO contacts. This enables the user to simply recall
presets or call events, change device configurations and report general status information.
Audio Processing Blocks
Above you see the various function blocks of the audio processor rendered by the DSP engine.
Each function block has its representation in the GUI by individual tab sheets. You may simply click on the
respective graphical area as an alternative way to navigate through the GUI.
It is important to understand that the physical input interfaces of the device (SDI DE-EMBEDDER, AES IN)
must be routed to the DSP inputs in order to process it. Similarly the DSP outputs must be routed to output
interfaces (SDI EMBEDDER, AES OUT). You will find those settings by clicking on the ROUTING tab.