Altera Arria V GX FPGA Development Board - Manual (Page 61)

Chapter 2: Board Components 2–51
Components and Interfaces
November 2013 Altera Corporation Arria V GX FPGA Development Board
Reference Manual
J3 FMC_CLK_BIDIR_N3 AT22 2.5-V CMOS Clock input or output 3
B1 FMC_CLK_DIR AW21 2.5-V CMOS Clock direction select for FMC_CLK_BIDIR
H4 FMC_CLK_M2C_P0 AV19 2.5-V CMOS Clock input 0
H5 FMC_CLK_M2C_N0 AU19 2.5-V CMOS Clock input 0
G2 FMC_CLK_M2C_P1 AF21 2.5-V CMOS Clock input 1
G3 FMC_CLK_M2C_N1 AE21 2.5-V CMOS Clock input 1
C3 FMC_DP_C2M_N0 AD4 2.5-V CMOS Transmit channel
A23 FMC_DP_C2M_N1 Y4 2.5-V CMOS Transmit channel
A27 FMC_DP_C2M_N2 T4 2.5-V CMOS Transmit channel
A31 FMC_DP_C2M_N3 P4 2.5-V CMOS Transmit channel
A35 FMC_DP_C2M_N4 H4 2.5-V CMOS Transmit channel
A39 FMC_DP_C2M_N5 M4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B37 FMC_DP_C2M_N6 K4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B33 FMC_DP_C2M_N7 F4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B29 FMC_DP_C2M_N8 D4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B25 FMC_DP_C2M_N9 B4 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
C2 FMC_DP_C2M_P0 AD3 2.5-V CMOS Transmit channel
A22 FMC_DP_C2M_P1 Y3 2.5-V CMOS Transmit channel
A26 FMC_DP_C2M_P2 T3 2.5-V CMOS Transmit channel
A30 FMC_DP_C2M_P3 P3 2.5-V CMOS Transmit channel
A34 FMC_DP_C2M_P4 H3 2.5-V CMOS Transmit channel
A38 FMC_DP_C2M_P5 M3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B36 FMC_DP_C2M_P6 K3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B32 FMC_DP_C2M_P7 F3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B28 FMC_DP_C2M_P8 D3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B24 FMC_DP_C2M_P9 B3 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
C7 FMC_DP_M2C_N0 AE2 2.5-V CMOS Transmit channel
A3 FMC_DP_M2C_N1 AA2 2.5-V CMOS Transmit channel
A7 FMC_DP_M2C_N2 U2 2.5-V CMOS Transmit channel
A11 FMC_DP_M2C_N3 R2 2.5-V CMOS Transmit channel
A15 FMC_DP_M2C_N4 J2 2.5-V CMOS Transmit channel
A19 FMC_DP_M2C_N5 N2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B17 FMC_DP_M2C_N6 L2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B13 FMC_DP_M2C_N7 G2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B9 FMC_DP_M2C_N8 E2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
B5 FMC_DP_M2C_N9 C2 2.5-V CMOS Transmit channel (available in Arria V GT FPGA device)
C6 FMC_DP_M2C_P0 AE1 2.5-V CMOS Transmit channel
A2 FMC_DP_M2C_P1 AA1 2.5-V CMOS Transmit channel
Table 2–50. FMC Connector Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 7)
Board
Reference
(J10)
Schematic
Signal Name
Arria V GX
FPGA
Pin Number
I/O Standard Description