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Fmc connector, Fmc connector –50 – Altera Arria V GX FPGA Development Board User Manual

Page 60

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2–50

Chapter 2: Board Components

Components and Interfaces

Arria V GX FPGA Development Board

November 2013

Altera Corporation

Reference Manual

Table 2–49

lists the SFP+ module component reference and manufacturing

information.

FMC Connector

The development board contains a high pin count (HPC) FPGA mezzanine card
(FMC) connector that functions with a quadrature amplitude modulation (QAM)
digital-to-analog converter (DAC) FMC module or daughter card. This pinout
satisfies a QAM DAC that requires 58 LVDS data output pairs, one LVDS input clock
pair, and three low-voltage differential signaling (LVDS) control pairs from the
Arria V. These pins also have the option to be used as single-ended I/O pins. The
VCCIO supply for the FMC A banks in the low pin count (LPC) and HPC provide a
variable voltage of 1.5 V, 1.8 V, 2.5 V (default), or 3.3 V. The VCCIO supply for the
FMC B bank in the HPC provides a variable voltage from 1.2 V to 3.3 V, which can be
supplied by the FMC module. However, for the sake of device safety concerns, a
jumper is available for you to connect this bank to the same VCCIO used for the FMC
A banks. This allows the VCCIO pins on the FPGA to be tied to a known power. The
VCCIO pins also allows you the option to perform a manual check for the module’s
input voltage before connecting to the FPGA. This is to ensure that the module does
not exceed the power supply maximum voltage rating.

Table 2–50

lists the FMC connector pin assignments, signal names, and functions.

4

SFP_SDA1

AC16

1.5-V PCML

Serial 2-wire data

3

SFP_TX_DIS1

AN15

1.5-V PCML

Drive low to disable transmitter

19

SFP_TX_N1

W36

1.5-V PCML

Transmitter data

18

SFP_TX_P1

W37

1.5-V PCML

Transmitter data

7

SFP_TX_RS01

AN14

1.5-V PCML

Reserved

9

SFP_TX_RS11

AE15

1.5-V PCML

Reserved

Table 2–48. SFP+ Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 2)

Board

Reference (J10)

Schematic Signal Name

Arria V GX FPGA

Pin Number

I/O Standard

Description

Table 2–49. SFP+ Interface Component Reference and Manufacturing Information

Board

Reference

Description

Manufacturer

Manufacturing

Part Number

Manufacturer

Website

B2

SFP+ right-angle, press-fit cage

Molex

74754-0101

www.molex.com

J10

SFP+ right-angle, 20-pin SMT
connector

Samtec

MECT-110-01-M-D-RA1

www.samtec.com

Table 2–50. FMC Connector Pin Assignments, Schematic Signal Names, and Functions (Part 1 of 7)

Board

Reference

(J10)

Schematic

Signal Name

Arria V GX

FPGA

Pin Number

I/O Standard

Description

D1

FMC_C2M_PG

2.5-V CMOS

Power good output

K4

FMC_CLK_BIDIR_P2

AE23

2.5-V CMOS

Clock input or output 2

K5

FMC_CLK_BIDIR_N2

AD22

2.5-V CMOS

Clock input or output 2

J2

FMC_CLK_BIDIR_P3

AU22

2.5-V CMOS

Clock input or output 3