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General user input/output, User-defined push buttons, General user input/output –29 – Altera Arria V GX FPGA Development Board User Manual

Page 39: User-defined push buttons –29

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Chapter 2: Board Components

2–29

General User Input/Output

November 2013

Altera Corporation

Arria V GX FPGA Development Board

Reference Manual

General User Input/Output

This section describes the user I/O interface to the FPGA, including the push buttons,
DIP switches, status LEDs, character LCD, and SDI video output/input port.

User-Defined Push Buttons

The development board includes three user-defined push buttons for each FPGA
device. For information on the system and safe reset push buttons, refer to

“Setup

Elements” on page 2–21

.

Board references S5, S6, and S7 are push buttons that allow you to interact with the
Arria V GX FPGA 1 while S9, S10, and S11 are for use with the Arria V GX FPGA 2.
When you press and hold down the button, the device pin is set to logic 0; when you
release the button, the device pin is set to logic 1. There are no board-specific functions
for these general user push buttons.

Table 2–25

lists the user-defined push button schematic signal names and their

corresponding Arria V GX FPGA device pin numbers.

X6

50-MHz oscillator

ECS Inc.

ECS-3518-500-B-xx

www.ecsxtal.com

U34, U48,
U53, U52

Quad output programmable
clock generator

Silicon Labs Inc.

Si5338A-A01316-GM,
Si5338A-A01317-GM,
Si5338A-A01318-GM,
Si5338A-A01319-GM

www.silabs.com

X7

100-MHz single output
programmable oscillator

Silicon Labs Inc. 570FAB000433DG

www.silabs.com

X2

148.5-MHz single output
programmable VCXO

Silicon Labs Inc. 571FDB000159DG

www.silabs.com

X7

100 MHz crystal oscillator

ECS Inc.

ECS-3525-1000-B-TR

www.ecsxtal.com

Table 2–24. Crystal Oscillator Component References and Manufacturing Information

Board

Reference

Description

Manufacturer

Manufacturer Part Number

Manufacturer

Website

Table 2–25. User-Defined Push Button Schematic Signal Names and Functions

Board Reference

Schematic Signal

Name

Arria V GX FPGA Pin

Number

I/O Standard

Description

S6

USER1_PB0

U16.T19

2.5-V

User-defined push buttons for
FPGA 1.

S5

USER1_PB1

U16.R19

2.5-V

S4

USER1_PB2

U16.F18

2.5-V

S11

USER2_PB0

U13.D6

2.5-V

User-defined push buttons for
FPGA 2.

S10

USER2_PB1

U13.C6

2.5-V

S9

USER2_PB2

U13.K7

2.5-V