Altera Arria V GX FPGA Development Board - Manual (Page 32)

2–22 Chapter 2: Board Components
Configuration, Status, and Setup Elements
Arria V GX FPGA Development Board November 2013 Altera Corporation
Reference Manual
Table 2–12 lists the board settings DIP switch component reference and
manufacturing information.
JTAG Settings DIP Switch
The JTAG settings DIP switch (SW6) either remove or include devices in the active
JTAG chain. However, the Arria V GX FPGA 1 is always in the JTAG chain.
Table 2–13
lists the switch controls and its descriptions.
Table 2–14 lists the JTAG chain header switch component reference and
manufacturing information.
PCI Express Control DIP Switch
The PCI Express control DIP switch (SW7) is provided to enable or disable different
configurations.
Table 2–15 lists the switch controls and descriptions.
Table 2–12. Board Settings DIP Switch Component Reference and Manufacturing Information
Board
Reference
Description Manufacturer
Manufacturer
Part Number
Manufacturer Website
SW5 Four-position DIP switch
C&K Components/ ITT
Industries
TDA04H0SB1 www.ittcannon.com
Table 2–13. JTAG Chain Header Switch Controls
Switch Schematic Signal Name Description Default
1 HSMA_JTAG_EN
ON : Bypass HSMA
OFF : HSMA in-chain
ON
2 HSMB_JTAG_EN
ON : Bypass HSMB
OFF : HSMB in-chain
ON
3 FMC_JTAG_EN
ON : Bypass FMC connector
OFF : FMC connector in-chain
ON
4 NC Unused OFF
Table 2–14. JTAG Chain Header Switch Component Reference and Manufacturing Information
Board
Reference
Description Manufacturer
Manufacturer
Part Number
Manufacturer Website
SW6 Four-position DIP switch
C&K Components/ ITT
Industries
TDA04H0SB1 www.ittcannon.com
Table 2–15. PCI Express Control DIP Switch Controls (Part 1 of 2)
Switch Schematic Signal Name Description Default
1 PCIE_PRSNT2n_x1
ON : Enable x1 presence detect
OFF : Disable x1 presence detect
ON
2 PCIE_PRSNT2n_x4
ON : Enable x4 presence detect
OFF : Disable x4 presence detect
ON