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Fpga programming over external usb-blaster, Status elements, Fpga programming over external usb-blaster –19 – Altera Arria V GX FPGA Development Board User Manual

Page 29: Status elements –19

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Chapter 2: Board Components

2–19

Configuration, Status, and Setup Elements

November 2013

Altera Corporation

Arria V GX FPGA Development Board

Reference Manual

Table 2–8

defines the hardware page that loads when you press the PGM1_CONFIG push

button (S3).

FPGA Programming over External USB-Blaster

The JTAG programming header provides another method for configuring the FPGA
using an external USB-Blaster device with the Quartus II Programmer running on a
PC. The external USB-Blaster connects to the board through the JTAG connector (J5).
Both FPGAs and the MAX II devices are always in the JTAG chain.

f

For more information on the following topics, refer to the respective documents:

Board Update Portal and PFL design, refer to the

Arria V GX FPGA Development

Kit, User Guide

.

PFL megafunction, refer to

Parallel Flash Loader Megafunction User Guide.

Status Elements

The development board includes status LEDs. This section describes the status
elements.

Table 2–9

lists the LED board references, names, and functional descriptions.

Table 2–8. PGM1_LED Settings

PGM1_LED0

PGM1_LED1

PGM1_LED2

Design

ON

OFF

OFF

Factory hardware

OFF

ON

OFF

User design 1

OFF

OFF

ON

User design 2

Table 2–9. Board-Specific LEDs (Part 1 of 2)

Board

Reference

Schematic Signal

Name

Arria V GX FPGA

Pin Number

I/O

Standard

Description

D1

Power

5.0-V

Blue LED. Illuminates when 5.0 V power is active.

D16

MAX_CONF_DONE1

2.5-V

Green LED. Illuminates when the MAX II CPLD
EPM2210 System Controller is successfully
configured. Driven by the MAX II CPLD EPM2210
System Controller.

D17

MAX_LOAD1

2.5-V

Green LED. Illuminates when the MAX II CPLD
EPM2210 System Controller is actively configuring
the FPGA. Driven by the MAX II CPLD EPM2210
System Controller wire-OR'd with the on-board
USB-Blaster II CPLD.

D15

MAX_ERROR1

2.5-V

Red LED. Illuminates when the MAX II CPLD
EPM2210 System Controller fails to configure the
FPGA. Driven by the MAX II CPLD EPM2210
System Controller.

D12, D13,

D14

PGM1_LED[2:0]

2.5-V

Green LEDs. Illuminates to indicate which hardware
page loads from flash memory when you press the
PGM1_SEL

push button or when you power-on the

board.