Altera Cyclone V E FPGA Development Board - Manual (Page 34)

2–26 Chapter 2: Board Components
Components and Interfaces
Cyclone V E FPGA Development Board March 2013 Altera Corporation
Reference Manual
33 ENETA_MDI_P1 — 2.5-V CMOS Media dependent interface
34 ENETA_MDI_N1 — 2.5-V CMOS Media dependent interface
39 ENETA_MDI_P2 — 2.5-V CMOS Media dependent interface
41 ENETA_MDI_N2 — 2.5-V CMOS Media dependent interface
42 ENETA_MDI_P3 — 2.5-V CMOS Media dependent interface
43 ENETA_MDI_N3 — 2.5-V CMOS Media dependent interface
Ethernet PHY B (U11)
8 ENETB_GTX_CLK E28 2.5-V CMOS 125-MHz RGMII transmit clock
23 ENETB_INTN K22 2.5-V CMOS Management bus interrupt
60 ENETB_LED_DUPLEX — 2.5-V CMOS Duplex or collision LED. Not used
70 ENETB_LED_DUPLEX — 2.5-V CMOS Duplex or collision LED. Not used
76 ENETB_LED_LINK10 — 2.5-V CMOS 10-Mb link LED
74 ENETB_LED_LINK100 — 2.5-V CMOS 100-Mb link LED
73 ENETB_LED_LINK1000 — 2.5-V CMOS 1000-Mb link LED
58 ENETB_LED_RX — 2.5-V CMOS RX data active LED
69 ENETB_LED_RX — 2.5-V CMOS RX data active LED
68 ENETB_LED_TX — 2.5-V CMOS TX data active LED
25 ENETB_MDC A29 2.5-V CMOS Management bus data clock
24 ENETB_MDIO L23 2.5-V CMOS Management bus data
28 ENETB_RESETN M21 2.5-V CMOS Device reset
2 ENETB_RX_CLK R23 2.5-V CMOS RGMII receive clock
95 ENETB_RX_D0 F25 2.5-V CMOS RGMII receive data bus
92 ENETB_RX_D1 F26 2.5-V CMOS RGMII receive data bus
93 ENETB_RX_D2 R20 2.5-V CMOS RGMII receive data bus
91 ENETB_RX_D3 T21 2.5-V CMOS RGMII receive data bus
94 ENETB_RX_DV L24 2.5-V CMOS RGMII receive data valid
11 ENETB_TX_D0 F29 2.5-V CMOS RGMII transmit data bus
12 ENETB_TX_D1 D30 2.5-V CMOS RGMII transmit data bus
14 ENETB_TX_D2 C30 2.5-V CMOS RGMII transmit data bus
16 ENETB_TX_D3 F28 2.5-V CMOS RGMII transmit data bus
9 ENETB_TX_EN B29 2.5-V CMOS RGMII transmit enable
55 ENETB_XTAL_25MHZ — 2.5-V CMOS 25-MHz RGMII transmit clock
29 ENETB_MDI_P0 — 2.5-V CMOS Media dependent interface
31 ENETB_MDI_N0 — 2.5-V CMOS Media dependent interface
33 ENETB_MDI_P1 — 2.5-V CMOS Media dependent interface
34 ENETB_MDI_N1 — 2.5-V CMOS Media dependent interface
39 ENETB_MDI_P2 — 2.5-V CMOS Media dependent interface
41 ENETB_MDI_N2 — 2.5-V CMOS Media dependent interface
Table 2–20. Ethernet PHY Pin Assignments, Signal Names and Functions (Part 2 of 3)
Board
Reference
Schematic Signal Name
Cyclone V E FPGA
Pin Number
I/O Standard Description