Altera Cyclone V E FPGA Development Board - Manual (Page 16)

2–8 Chapter 2: Board Components
MAX V CPLD 5M2210 System Controller
Cyclone V E FPGA Development Board March 2013 Altera Corporation
Reference Manual
F13 FSM_A9 2.5-V FSM address bus
E15 FSM_A10 2.5-V FSM address bus
E16 FSM_A11 2.5-V FSM address bus
F15 FSM_A12 2.5-V FSM address bus
G14 FSM_A13 2.5-V FSM address bus
F16 FSM_A14 2.5-V FSM address bus
G13 FSM_A15 2.5-V FSM address bus
G15 FSM_A16 2.5-V FSM address bus
G12 FSM_A17 2.5-V FSM address bus
G16 FSM_A18 2.5-V FSM address bus
H14 FSM_A19 2.5-V FSM address bus
H20 FSM_A20 2.5-V FSM address bus
H13 FSM_A21 2.5-V FSM address bus
H16 FSM_A22 2.5-V FSM address bus
J13 FSM_A23 2.5-V FSM address bus
J16 FSM_A24 2.5-V FSM address bus
T2 FSM_A25 2.5-V FSM address bus
P5 FSM_A26 2.5-V FSM address bus
J14 FSM_D0 2.5-V FSM data bus
J15 FSM_D1 2.5-V FSM data bus
K16 FSM_D2 2.5-V FSM data bus
K13 FSM_D3 2.5-V FSM data bus
K15 FSM_D4 2.5-V FSM data bus
K14 FSM_D5 2.5-V FSM data bus
L16 FSM_D6 2.5-V FSM data bus
L11 FSM_D7 2.5-V FSM data bus
L15 FSM_D8 2.5-V FSM data bus
L12 FSM_D9 2.5-V FSM data bus
M16 FSM_D10 2.5-V FSM data bus
L13 FSM_D11 2.5-V FSM data bus
M15 FSM_D12 2.5-V FSM data bus
L14 FSM_D13 2.5-V FSM data bus
N16 FSM_D14 2.5-V FSM data bus
M13 FSM_D15 2.5-V FSM data bus
B8 HSMA_PRSNTN 2.5-V HSMC port present
L6 JTAG_5M2210_TDI 3.3-V MAX V CPLD JTAG chain data in
M5 JTAG_5M2210_TDO 3.3-V MAX V CPLD JTAG chain data out
P3 JTAG_TCK 3.3-V JTAG chain clock
Table 2–4. MAX V CPLD 5M2210 System Controller Device Pin-Out (Part 3 of 5)
Board
Reference (U13)
Schematic Signal Name I/O Standard Description