Altera Interlaken MegaCore Function - Manual (Page 80)

B–8 Appendix B: Excluding Transceivers for Faster Simulation
Reset in Interlaken MegaCore Functions Without Transceivers
Interlaken MegaCore Function June 2012 Altera Corporation
User Guide
1 In systems generated by Qsys, if you turn on Global reset on the Project Settings tab,
these circuits are generated automatically. However, Altera recommends that you
turn off Global reset in a Qsys system that includes an Interlaken MegaCore function
without high-speed transceivers, because the Qsys-generated reset sequence does not
meet the reset sequence requirements for this MegaCore function.
Required Reset Sequence
To reset your Interlaken MegaCore function, perform the following reset sequence:
1. Assert the MAC resets (rx_mac_r_reset and tx_mac_r_reset) and the lane reset
(tx_lane_r_reset).
2. De-assert the tx_lane_r_reset reset signal.
3. Wait 256 tx_mac_c_clk cycles.
4. De-assert the rx_mac_r_reset and tx_mac_r_reset signals.
Ensure that you enforce the minimum hold time and synchronous deassertion
requirements for each reset signal, as described in
“Reset Signals” .
Following MAC deassertion, if your Interlaken MegaCore function initializes and
establishes an Interlaken link with its link partner in simulation, you should observe
the behavior described in
“Expected Behavior at Initialization” on page A–1 .