Altera Interlaken MegaCore Function - Manual (Page 57)

Chapter 5: Signals 5–5
Application Interface Signals
June 2012 Altera Corporation Interlaken MegaCore Function
User Guide
Application Interface Signals
The application interface provides two channels through which the application
receives data from and sends data to the Interlaken link.
Table 5–5 through Table 5–8
describe the application interface signals.
RX Application Interface Signals
The RX application interface provides two channels through which the application
receives data from the Interlaken link.
Table 5–5 and Table 5–6 describe the RX application interface signals. For more
information about these signals, refer to “Packet Regrouper” on page 4–19 .
Table 5–5. RX Application Interface Clock Signal
Signal Direction Description
rx_mac_c_clk Input
Clocks the Interlaken MegaCore function MAC RX block and therefore, also, the RX
application interface.
For all MegaCore function variations except the 8-lane, 3.125-Gbps variations, Altera
recommends that you drive this signal with the tx_coreclkout signal (in variations with
transceivers), or that you drive this signal with the same clock that drives the
tx_lane_c_clk
signal (in variations without transceivers).
For the 8-lane, 3.125-Gbps variations, the rx_mac_c_clk clock should be driven by a
faster clock than the RX PCS clock. For these variations, Altera recommends that
rx_mac_c_clk
be driven by the same clock that drives the tx_mac_c_clk. For
recommended frequencies, refer to “Interlaken MegaCore Function Recommended Clock
Rates” on page 4–9 .
Table 5–6. RX Application Data Interface Signals (1) (Part 1 of 2)
Signal Direction Description
rx_chX_dataout_data[W:0] Output
Channel X data out. Streams the data received on the Interlaken interface
out on channel X. Width is 128 bits for variations that require the 20G/4L
license, 256 bits for variations that require the 40G/8L license, and 512
for variations that require one of the 100G licenses. For details, refer to
Table 4–5 on page 4–12 . (W = width – 1).
rx_chX_dataout_valid Output
Indicates data out on the current channel (rx_chX_dataout_data) is
valid in the current rx_mac_c_clk cycle.
rx_chX_dataout_startofpacket Output
Indicates data out on the current channel in the current rx_mac_c_clk
cycle includes a start-of-packet.
rx_chX_dataout_endofpacket Output
Indicates data out on current channel in the current rx_mac_c_clk
cycle includes an end-of-packet.
rx_chX_dataout_error Output
Indicates an error occurred during transmission of the current packet on
rx_chX_datain_data
. This signal is valid only in an end-of-packet
cycle.