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Altera DQ (ALTDQ) User Manual

Page 4

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Page 4

Getting Started

DQ (ALTDQ) and DQS (ALTDQS) Megafunctions

November 2010

Altera Corporation

Page 3 of the ALTDQS parameter editor is the General page.

Table 2 on page 4

describes options available on page 3 of the ALTDQS megafunction.

Table 2. General Settings (Part 1 of 3)

Option

Description

Supported Devices

Cy

clone

II

Cyclone

III, Cyclone

IV

GX

Str

a

tix, St

ratix GX,

Stra

tix

II,

Stratix

II

GX, Arria

GX, HardCopy

II

Currently selected device family

Displays the currently selected device family.

Yes

Yes

Yes

Yes

What is the frequency of the DQS
input(s) ?

This is the input DQS frequency.

(1)

Yes

Yes

No

No

How many DQS pins would you
like?

Specifies the number of DQS pins that are
implemented or the number of DQS/DQSn pin
pairs generated.The maximum number of pins
possible depends on the chosen device and the
'dqsn_padio' port option.

(2)

Yes

Yes

Yes

Yes

Create an output enable for the
DQS pins

This enables the DQS output path. Turn on this
option to create an output enable for the DQS
pins. If you select the no output enable port is
used
option, the dqs_padio signal drives out
permanently.

Yes

Yes

Yes

Yes

Register the output enable

This enables the DQS OE path. Turn on this
option to register the output enable port with
the outclk signal.

Yes

Yes

Yes

Yes

What will control the DQS/nDQS
delay chains?

DLL feedback loop counter controls the
DQS/nDQS delay chains

This is the default option. DLL inserts a delay
equivalent to requested phase-shift at input
clock frequency. Input clock frequency and
phase-shift are set on page 4.

(3)

No DLL is used

No DLL and no delay is added between the
DQS/nDQS and the dqinclk port.

Yes

Yes

Yes.

Always

uses
DLL.

Yes. Have

an option

to choose

either DLL

or no DLL.

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