Altera DQ (ALTDQ) - Manual (Page 13)

Getting Started Page 13
November 2010 Altera Corporation DQ (ALTDQ) and DQS (ALTDQS) Megafunctions
.cmp), Quartus II symbol file (.bsf), Instantiation
template file (.v), and Verilog HDL black box file (name>_bb.v). If you select Generate Netlist on the Simulation Model page, the file
for that netlist is also available. A gray checkmark indicates a file that is automatically
generated, and a red checkmark indicates generation of an optional file.
MegaWizard Plug-In Manager Page Option and Description ALTDQ
Megafunction
Table 8 defines the parameterization options that are available for the ALTDQ
megafunction..
Table 8. MegaWizard Plug-In Manager Page Option and Description
Page Options Descriptions
1 Which action do you want to perform?
You can select from the following options: Create a new custom
megafunction variation, Edit an existing custom megafunction
variation, or Copy an existing custom megafunction variation.
2a
Select a megafunction from the list
below
Select ALTDQ from the I/O category
Which device family will you be
using?
Specify the device family you want to use.
Which type of output file do you want
to create? You can choose from AHDL (.tdf), VHDL (.vhd), or Verilog HDL
(.v) as the output file type.
What name do you want for the output
file?
Specify the file name without the file extension.