Altdqs – Altera DQ (ALTDQ) User Manual
Page 24
Page 24
Specifications
DQ (ALTDQ) and DQS (ALTDQS) Megafunctions
November 2010
Altera Corporation
ALTDQS
component altdqs
generic (
delay_buffer_mode
:
string := "low";
delay_chain_mode
:
string := "static";
intended_device_family
:
string := "unused";
dll_delay_chain_length
:
natural := 12;
dll_delayctrl_mode
:
string := "normal";
dll_jitter_reduction
:
string := "true";
dll_offsetctrl_mode
:
string := "none";
dll_phase_shift
:
string := "unused";
dll_static_offset
:
string := "0";
dll_use_reset
:
string := "false";
dll_use_upndnin
:
string := "false";
dll_use_upndninclkena
:
string := "false";
dqs_ctrl_latches_enable
:
string := "true";
dqs_delay_chain_length
:
natural := 3;
dqs_delay_chain_setting
:
string := "0";
dqs_delay_requirement
:
string := "unused";
dqs_edge_detect_enable
:
string := "false";
dqs_oe_async_reset
:
string := "none";
dqs_oe_power_up
:
string := "low";
dqs_oe_register_mode
:
string := "register";
dqs_oe_sync_reset
:
string := "none";
dqs_open_drain_output
:
string := "false";
dqs_output_async_reset
:
string := "none";
dqs_output_power_up
:
string := "low";
dqs_output_sync_reset
:
string := "none";
dqs_use_dedicated_delayctrlin
:
string := "true";
dqsn_mode
:
string := "none";
extend_oe_disable
:
string := "true";
gated_dqs
:
string := "false";
has_dqs_delay_requirement
:
string := "true";
input_frequency
:
string;
invert_output
:
string := "false";
number_of_dqs
:
natural;
number_of_dqs_controls
:
natural := 1;
sim_invalid_lock
:
natural := 100000;
sim_valid_lock
:
natural := 1;
tie_off_dqs_oe_clock_enable
:
string := "false";
tie_off_dqs_output_clock_enable
:
string := "false";
lpm_hint
:
string := "UNUSED";
lpm_type
:
string := "altdqs"
);
port(
dll_addnsub
:
in std_logic := '0';
dll_delayctrlout
:
out std_logic_vector(5 downto 0);
dll_offset
:
in std_logic_vector(5 downto 0) := (others => '0');
dll_reset
:
in std_logic := '0';
dll_upndnin
:
in std_logic := '0';
dll_upndninclkena
:
in std_logic := '1';
dll_upndnout
:
out std_logic;
dqddioinclk
:
out std_logic_vector(number_of_dqs-1 downto 0);
dqinclk
:
out std_logic_vector(number_of_dqs-1 downto 0);
dqs_areset
:
in std_logic_vector(number_of_dqs_controls-1 downto 0) := (others => '0');
dqs_datain_h
:
in std_logic_vector(number_of_dqs-1 downto 0);
dqs_datain_l
:
in std_logic_vector(number_of_dqs-1 downto 0);
dqs_delayctrlin
:
in std_logic_vector(5 downto 0) := (others => '0');
dqs_padio
:
inout std_logic_vector(number_of_dqs-1 downto 0);
dqs_sreset
:
in std_logic_vector(number_of_dqs_controls-1 downto 0) := (others => '0');
dqsn_padio
:
inout std_logic_vector(number_of_dqs-1 downto 0);
dqsundelayedout
:
out std_logic_vector(number_of_dqs-1 downto 0);
enable_dqs
:
in std_logic_vector(number_of_dqs-1 downto 0) := (others => '1');
inclk
:
in std_logic := '0';
oe
:
in std_logic_vector(number_of_dqs_controls-1 downto 0) := (others => '1');
outclk
:
in std_logic_vector(number_of_dqs_controls-1 downto 0);
outclkena
:
in std_logic_vector(number_of_dqs_controls-1 downto 0) := (others => '1')
);
end component;