Echelon FTXL Hardware User Manual
Page 7
FTXL Hardware Guide
vii
Table of Contents
Related Altera Product Documentation ................................................iv
Related devboards.de Product Documentation...................................... v
The FTXL Development Process................................................................... 3
Overview of the FTXL Developer’s Kit Hardware ....................................... 8
The DBC2C20 Development Board .............................................................. 8
Connectors and Headers ....................................................................... 11
Connectors and Headers ....................................................................... 13
The FTXL Transceiver Board...................................................................... 15
Connectors and Headers ....................................................................... 16
FTXL Transceiver Hardware Interface........................................................... 19
Overview of the Hardware Interface .......................................................... 20
Pull-Up Resistors for Communications Lines...................................... 21
The Parallel Communications Interface..................................................... 21
Token Passing and Handshaking......................................................... 23
FTXL Transceiver Pin Characteristics....................................................... 24
Reset Function ................................................................................ 25
Power-Up Sequence ........................................................................ 26
Software Controlled Reset.............................................................. 27
Watchdog Timer .............................................................................. 27
LVI Considerations ......................................................................... 27
Reset Processes and Timing ........................................................... 27
FPGA Pin Assignments for the FTXL Transceiver ................................... 28
Control Flow: Host Receiving Data from the FTXL Transceiver.............. 29
Control Flow: Host Sending Data to the FTXL Transceiver..................... 32