Echelon FTXL Hardware - Manual (Page 12)

4 FTXL Hardware Overview
• RAM, read/write non-volatile memory (such as flash) to store
configuration data, and non-volatile memory (such as flash) to store the
FTXL application
• The associated FPGA design and printed-circuit board (PCB) design for
the device
Thus, the development process for an FTXL device includes the following tasks:
1. Gather the requirements for the device
2. Based on those requirements, determine the necessary functionality of
the FPGA device, including the Nios II processor, on-chip memory, and
any intellectual property (IP) cores
3. Implement the FPGA design using the Altera Quartus II software
4. Choose the physical FPGA device, along with its corresponding
configuration device, and load the design into the device
5. Design and implement a prototype PCB design for the FPGA device and
FTXL Transceiver (this step can be deferred if you use the reference
designs for the DBC2C20 development board for prototyping)
6. Design the FTXL application program, using the FTXL LonTalk protocol
stack
7. Load the software into the FPGA device
8. Test the completed FTXL device
9. Integrate the FTXL device into a L
ON
W
ORKS
network
10. Design and implement the final PCB design for the FPGA device and
FTXL Transceiver
This book describes many of these tasks. See the appropriate Altera
documentation for additional design considerations for an FPGA device; see the
FT 3120 / FT 3150 Smart Transceiver Data Book for design considerations for an
FT 3120 Smart Transceiver, which shares electrical and physical characteristics
with the FTXL Transceiver; and see the FTXL User’s Guide for information
about software design for an FTXL device.
Hardware Design
A minimal hardware design for an FTXL device includes the following elements:
• An Echelon FTXL 3190 Smart Transceiver Chip
• An Echelon FT-X1 or FT-X2 Communication Transformer
• A crystal oscillator for the FTXL Transceiver Chip
• Associated circuitry for communications, as described in the
FT 3120 / FT
3150 Smart Transceiver Data Book
• A charge pump DC-DC converter (or similar device) to allow the FTXL
Transceiver Chip and FPGA device to share a common power supply
• A FPGA device, such as an Altera Cyclone II or Cyclone III device
• An FPGA serial configuration device