Echelon FTXL Hardware - Manual (Page 31)

FTXL Hardware Guide 23
Figure 7. The FTXL Transceiver Parallel Interface
From the point of view of the host processor, the FTXL Transceiver appears as a
memory-mapped parallel I/O device with eight data bits and three control bits.
The FTXL LonTalk protocol stack communicates with the FTXL Transceiver
through two logical registers: an 8-bit read/write data register and a 1-bit read-
only status register. The FTXL LonTalk protocol stack reads the status register’s
HS bit before every read or write.
Token Passing and Handshaking
To eliminate the possibility of data bus contention, the FTXL LonTalk protocol
stack (the master) and the FTXL Transceiver pass a virtual token between them
to indicate which one of them can write to the data bus. Only the owner of the
token can write to the data bus. After the initial device synchronization (or
device resynchronization), the FTXL LonTalk protocol stack owns the token.
Whenever the FTXL LonTalk protocol stack reads data from the bus or writes
data to the bus, the FTXL Transceiver sets the HS signal high. Conversely,
whenever the FTXL Transceiver reads or writes data, it sets the HS signal low.
That is, when the FTXL LonTalk protocol stack owns the token, it waits for the
HS signal from the FTXL Transceiver before it writes data to the bus, and when
the FTXL Transceiver owns the token, the host program monitors the low
transition of the HS signal before it reads the bus.
The FTXL link-layer serial driver, included with the FTXL LonTalk protocol
stack, manages the token and the handshake protocol. Token ownership and
handshaking are transparent to your FTXL application.
Transferring Data
The data transfer operation between the FTXL LonTalk protocol stack (the
master) and the FTXL Transceiver uses the virtual write token passing protocol.