Echelon FTXL Hardware - Manual (Page 58)

50 FPGA Design for the FTXL Transceiver
Component Component Name
Size
(Bytes)
SDRAM interface for the DBC2C20
development board
sdram 16 MB
Table 16 lists the interrupt request (IRQ) numbers for each of the components
that can generate an interrupt. Your FTXL FPGA design can specify different
IRQ numbers, as long as the components retain the same relative interrupt
levels.
Table 16. IRQ Specifications for the FTXL Reference Design
Component Component Name
IRQ
Number
System timer sys_timer 0
JTAG UART jtag_uart 1
High-resolution timer high_res_timer 2
EPCS serial flash
controller port
epcs_controller 3
FTXL Transceiver
interrupt
FTXL_IRQ_inst 11
FTXL service pin FTXL_SERVICE_PIN_inst 13
FTXL Hardware Abstraction Layer
The FTXL software design provides a hardware abstraction layer (HAL) that acts
as an interface between the Nios IDE-generated system library (primarily the
system.h file) and the FTXL software. The FTXL HAL provides a number of
abstract functions and macro definitions that allow portability among various
FPGA designs.
When you create or modify the FPGA design and regenerate the Nios system
library, you must modify the FTXL HAL to use the component names defined in
your Nios system library. Thus, the FTXL LonTalk protocol stack library works
with any underlying hardware, and you do not need to modify your FTXL host
program when you modify the hardware design.
Recommendation: The FTXL Developer’s Kit reference design defines a number
of component names (names that begin with FTXL_) that you should retain in
your design so that you do not need to modify the FTXL HAL. However, if you do
modify these names, you must modify the FTXL HAL appropriately. If you add
new components, you should define a new HAL for those components.
Important: Because the FTXL LonTalk protocol stack library calls the functions
that the FTXL HAL defines, you can change the behavior of these functions, but
not the function names of the programmatic interface.