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Fpga design, Software design – Echelon FTXL Hardware User Manual

Page 13

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FTXL Hardware Guide

5

• External memory (such as external RAM) for the FTXL application

program

• Non-volatile memory (such as flash memory) for network configuration

data

• Associated user I/O, such as a service pin and LED, reset button and

LED, and other I/O for the device

• A power supply

A more robust or complex design includes additional hardware components, such
as additional user I/O, support for a USB or other network interface, signal

processors, or other coprocessors.
Because an FTXL device is a communications device, its design must include
considerations for electromagnetic compatibility (EMC), including electrostatic

discharge (ESD), radio frequency (RF) immunity, and resistance to

electromagnetic interference (EMI).

See the

FT 3120 / FT 3150 Smart Transceiver Data Book

for overall design

considerations for an FT Smart Transceiver, including the FTXL Transceiver.

FPGA Design

A minimal FPGA design for an FTXL device includes the following elements:

• An Altera Nios II processor
• One or more phase-locked loop (PLL) components
• Definitions for the FTXL parallel communications interface (see

The

Parallel Communications Interface

on page 21)

• A definition for the FTXL Transceiver reset signal
• A definition for the FTXL Transceiver interrupt signal
• A definition for the FTXL service pin
• A definition for the FTXL service LED
• Definitions for user I/O
• An interface for both on-chip and external memory

Because an FPGA device can include multiple processors and many intellectual

property (IP) cores, a more robust or complex design can include any number of
additional design elements. These additional design elements, in turn, help

determine the specific type of FPGA device that your FTXL device requires.
Chapter 4,

FPGA Design for the FTXL Transceiver

, on page 37, describes

requirements for the FPGA design for an FTXL device.

Software Design

Software design for an FTXL device requires a host application program that

runs on the Nios II processor and uses the FTXL LonTalk protocol stack to
manage the FTXL Transceiver for communications with a L

ON

W

ORKS

network.

The LonTalk application programming interface (API) provides essential

functions for managing an FTXL Transceiver. This API shares many features