Echelon Neuron User Manual
Page 73

program memory. The size includes both the opcode and the instruction’s
data, if any.
•
The number of CPU cycles required to execute the instruction
Each machine instruction requires a number of processor clock cycles
(within the Neuron Chip or Smart Transceiver) to execute. The number
of cycles ranges from one to seven, depending on the type of operation.
•
The instruction’s affect on the Carry flag
Many machine instructions have an affect on the Carry flag, and some
use the contents of the Carry flag to perform their operation. The Carry
flag can be used, modified, or cleared by an instruction.
The description for each instruction also describes whether the instruction
applies to Series 3100 devices, Series 5000 and 6000 devices, or to both device
series. Most instructions apply to both series.
Neuron Assembly Language Reference
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