Echelon Neuron - Manual (Page 105)

POP (Pop from Stack)
The POP instruction pops a value from the data stack to a specified location.
The POP instruction uses one of the following addressing modes:
• In the indirect relative addressing mode, the POP [pointer-
register][offset] instruction pops the value from TOS into the location
specified by adding (using unsigned arithmetic) the contents of the
specified pointer register with the specified offset value. TOS is
consumed by this instruction. The value of the pointer-register expression
must be in the range 0 to 3. The offset expression must resolve at link
time to a value in the range 0 to 255.
• In the indirect indexed address mode, the POP [pointer-register]
[TOS] instruction pops the value from NEXT into the location specified
by adding (using unsigned arithmetic) the contents of the specified
pointer register with the value of TOS. This instruction consumes NEXT
but preserves TOS. The value of the pointer-register expression must be
in the range 0 to 3.
• In the direct addressing mode, the POP register instruction pops the
value from TOS into the specified CPU register. The register can be DSP,
FLAGS, or RSP. Because a POP instruction always decrements DSP,
the value in DSP after a POP DSP instruction is one less than the value
popped from TOS. And because the FLAGS register contains the Carry
flag, the POP FLAGS instruction modifies the Carry flag.
• In the DSP relative addressing mode, the POP [DSP][offset] instruction
pops the value from TOS into the stack location (relative to DSP)
specified by offset. The value of offset must be in the range -1 to -8.
Location -1 corresponds to the first byte on the stack below NEXT.
• In the absolute addressing mode, the POP address instruction pops the
value from TOS to the absolute address specified by address.
• In the BP relative addressing mode, the POP !byte-register instruction
pops the value from TOS into the specified general-purpose byte register
(R0..R15). The byte-register expression must resolve at link time to a
value in the range 8 to 23 for general-purpose byte registers R0 to R15,
respectively.
• In the BP indexed addressing mode, the POP !TOS instruction pops the
value from NEXT on the data stack into a location specified by adding
TOS to the contents of the base page register (BP). This instruction
consumes NEXT but preserves TOS.
The POP instruction applies to Series 3100, 5000, and 6000 devices.
Syntax:
The POP instruction requires one or two operands to specify which data stack
value to pop and the location into which to store the value:
POP [0][offset]
POP [1][offset]
Neuron Assembly Language Reference 95