Echelon Neuron - Manual (Page 37)

For the Neuron 3150 Chip and the FT 3150 Smart Transceiver, off-chip memory
on these chips consists of one or more of ROM, RAM, EEPROM, NVRAM, or flash
memory regions. You specify the starting page number for each region and the
number of pages (a page is 256 bytes) when the device is defined. If ROM is used,
its starting address must be 0000. If ROM is not used, then flash or NVRAM
memory must take its place, starting at address 0000. The regions of memory
must be in the order shown in Figure 5. They need not be contiguous, but they
cannot overlap.
For Series 5000 and 6000 devices, off-chip non-volatile memory can be either
EEPROM or flash memory. Off-chip non-volatile memory starts at address
0x4000, and can extend up to address 0xE7FF. This memory area is called
extended non-volatile memory. Figure 6 shows the memory map for Series 5000
and 6000 devices.
Memory mapped I/O devices can be connected to the Neuron 3150 Chip, FT 3150
Smart Transceiver, or PL 3150 Smart Transceiver. The devices should respond
only to memory addresses that correspond to any of the shaded areas in Figure
5.
Figure 5. Off-Chip Memory on the Neuron 3150 Chip, the FT 3150 Smart Transceiver, and
PL 3150 Smart Transceiver
Neuron Assembly Language Reference 27