Direct, Implicit, Pointer direct – Echelon Neuron User Manual

Page 41: Indirect relative

Direct

In the direct addressing mode, the instruction operand is a register name or an

expression that resolves to a name of a register. In contrast with the relative

addressing modes, the direct addressing mode manipulates the contents of the

push tos ; (TOS, ...)

sub tos,next ; (TOS-NEXT, ...)

The push tos instruction pushes TOS onto the stack, thus duplicating the value

in TOS. That is, both TOS and NEXT now hold the same value. The sub

tos,next instruction subtracts NEXT from TOS, and places the result in TOS.

The result of this two-instruction sequence is zero (in TOS).

Implicit

In the implicit addressing mode, the instruction takes no operands. The

instruction’s arguments are implicit.
Example:

add ; (TOS+NEXT, ...)

pushpop ; ( )

The add instruction adds the contents of TOS with the contents of NEXT, and

places the result in TOS. The pushpop instruction pops the top element from

the return stack and pushes it onto the data stack.

Pointer Direct

In the pointer-direct addressing mode, the instruction operand is a pointer

contrast with the relative addressing modes, the pointer-direct addressing mode

manipulates the contents of the register, rather than using the register as a

pointer or address.
Example:

inc [P0] ; ( )

pushd [P3] ; ([P3], ...)

The inc [P0] instruction increments the pointer register P0. The pushd [P3]

instruction pushes the two-byte pointer register P3 onto the data stack.

Indirect Relative

In the indirect-relative addressing mode, the instruction takes two arguments: a

pointer register (P0, P1, P2, or P3) or an expression that resolves to a pointer

offset must be in the range 0 to 255. The indirect-relative addressing mode uses

the pointer register plus offset as a pointer or address, rather than using the

contents of the register.

Neuron Assembly Language Reference