Echelon Neuron - Manual (Page 137)

XCH (Exchange)
The XCH instruction exchanges the contents of TOS and NEXT on the data
stack. The XCH instruction uses the implicit addressing mode.
The XCH instruction applies to Series 3100, 5000, and 6000 devices.
Syntax:
The XCH instruction requires no operands:
XCH
Table 57 describes the attributes of the XCH instruction.
Table 57. XCH Instruction
Instruction Hexadecimal
Opcode
Instruction
Size (Bytes)
CPU Cycles
Required
Affect on
Carry Flag
XCH B6 1 4 None
Example:
The following example pushes two numbers onto the data stack, then exchanges
their positions on the stack.
pushs #3 ; (3, -, -)
pushs #2 ; (2, 3, -)
xch ; (3, 2, -)
Neuron Assembly Language Reference 127