Solvline Eddy DK - Manual (Page 49)

Eddy DK Programmer Guide
49
2.5.2 Connector Pinout of Boards
2.5.2.1. ICE and JTAG
S4M
Pin No
(124)
Name
S4M-JIG
Pin HDR
(46*2)
S4M-DK
Pin HDR
(46*2)
Description
1 TDI - - Test Data IN
2 TDO - - Test Data Out
3 TMS - - Test Mode Select
4 RTCK - - Return Test Clock
5 TCK - - Test Clock
6 NTRST - - Test Reset
119 JTAGSEL - -
JTAG boundary scan can be used by connecting J3.
This pin should not be connected when using ICE (In-Circuit
Emulator) or in normal operation status.
2.5.2.2. Ethernet signal from or to PHYceiver
S4M
Pin No
(124)
Name
S4M-JIG
Pin HDR
(46*2)
S4M-
DK
Pin
HDR
(46*2)
Description
7 LAN_RX+ J5 pin2 J7 Pn2 Ethernet PHY Physical receive or transmit signal (+ differential) in CPU
8 LAN_TX+ J5 pin1 J7 Pin1 Ethernet PHY Physical receive or transmit signal (- differential) in CPU
9 LAN_RX- J5 pin3 J7 pin3 Ethernet PHY Physical receive or transmit signal (+ differential) in CPU
10 LAN_TX- J5 pin4 J7 pin4 Ethernet PHY Physical receive or transmit signal (- differential) in CPU
11 LAN_Speed J5 pin6 J7 pin6
LAN connection status LED
Link/Activity Pin State LED Definition
No Link H OFF
Link L ON
Activity Toggle Blinking
12 LAN_Link J5 pin5 J7 pin5
Link/Activity Pin State LED Definition
No Link H OFF
Link L ON
Activity Toggle Blinking