Cirrus Logic CS61884 - Manual (Page 52)

CS61884
52 DS485F3
Figure 18. Internal TX, External RX Impedance Matching
+
RGND
0.1
μ F
+3.3V
RV+
T1 1:2
REF
T R I N G
T T I P
T2 1:2
R T I P
R R I N G
R1
R2
13.3k
Ω
GND
CBLSEL
TV+
VCCIO
+3.3V
+
TGND
+
0.1
μ F
GNDIO
NC
100 Ω
75 Ω
Cable
120 Ω
Cable
GND
1k
Ω
1k
Ω
TRANSMIT
LINE
RECEIVE
LINE
0.1
μ F
0.1
μ F
Note 1 Note 1
Note 2
68
μ F
CS61884
One Channel
Notes: 1)Required Capacitor between each TV+, RV+, VCCIO and TGND, RGND, GNDIO
respectively.
2)Common decoupling capacitor for all TVCC and TGND pins.
Component
T1/J1 100 Ω
Twisted Pair
Cable
E1 75 Ω
Coaxial
Cable
E1 120 Ω
Twisted Pair
Cable
R1 (
Ω)
12.5 9.31 15
R2 ( Ω) 12.5 9.31 15