Cirrus Logic CS61884 - Manual (Page 51)

CS61884
DS485F3 51
18. APPLICATIONS
Figure 17. Internal RX/TX Impedance Matching
+
RGND
+3.3V
RV+
T1 1:2
REF
CS61884
One Channel
T R I N G
T T I P
TRANSMIT
LINE
T2 1:2
R T I P
R R I N G
R1
R2
13.3k
Ω
GND
CBLSEL
TV+
VCCIO
+3.3V
+
TGND
+
GNDIO
NC
100
Ω
75
Ω
Cable
120
Ω
Cable
+3.3V
68
μ F
0.1
μ F 0.1
μ F
0 .1
μ F
0 .1
μ F
RECEIVE
LINE
Note 2 Note 1 Note 1
Notes:1) Required Capacitor between each TV+, RV+, VCCIO and TGND, RGND, GNDIO respec-
tively.
2) Common decoupling capacitor for all TVCC and TGND pins.
Component
T1/J1 100 Ω
Twisted Pair
Cable
E1 75 Ω
Coaxial
Cable
E1 120 Ω
Twisted Pair
Cable
R1 (
Ω)
15 15 15
R2 ( Ω) 15 15 15