AMD SimNow Simulator 4.4.4 - Manual (Page 211)

AMD Confidential
User Manual September 12
th
, 2008
Appendix A 199
Instruction
Supported
Mnemonic Opcode Description
CMPS mem16,mem16 A7
Compare the word at DS:rSI with the
word at ES:rDI and then increment or
decrement rSI and rDI.
CMPS mem32,mem32 A7
Compare the doubleword at DS:rSI with
the doubleword at ES:rDI and then
increment or decrement rSI and rDI.
CMPS mem64,mem64 A7
Compare the quadword at DS:rSI with
the quadword at ES:rDI and then
increment or decrement rSI and rDI.
CMPSB A6
Compare the byte at DS:rSI with the
byte at ES:rDI and then increment or
decrement rSI and rDI.
CMPSW A7
Compare the word at DS:rSI with the
word at ES:rDI and then increment or
decrement rSI and rDI.
CMPSD A7
Compare the doubleword at DS:rSI with
the doubleword at ES:rDI and then
increment or decrement rSI and rDI.
CMPSQ A7
Compare the quadword at DS:rSI with
the quadword at ES:rDI and then
increment or decrement rSI and rDI.
CMPXCHG reg/mem8,reg8 0F B0 /r
Compare AL register with an 8-bit
register or memory location. If
equal, copy the second operand to the
first operand. Otherwise, copy the
first operand to AL.
CMPXCHG reg/mem16,reg16 0F B1 /r
Compare AX register with a 16-bit
register or memory location. If
equal, copy the second operand to the
first operand. Otherwise, copy the
first operand to AX.
CMPXCHG reg/mem32,reg32 0F B1 /r
Compare EAX register with a 32-bit
register or memory location. If
equal, copy the second operand to the
first operand. Otherwise, copy the
first operand to EAX.
CMPXCHG reg/mem64,reg64 0F B1 /r
Compare RAX register with a 64-bit
register or memory location. If
equal, copy the second operand to the
first operand. Otherwise, copy the
first operand to RAX.
CMPXCHG8B 0F C7 /1 m64
Compare EDX:EAX register to 64-bit
memory location. If equal, set the
zero flag (ZF) to 1 and copy the
ECX:EBX register to the memory
location. Otherwise, copy the memory
location to EDX:EAX and clear the
zero flag.
CPUID 0F A2
Executes the CPUID function whose
number is in the EAX register.
DAA 27 Decimal adjust AL.
DAS 2F Decimal adjusts AL after subtraction.
DEC reg/mem8 FE /1
Decrement the contents of an 8-bit
register or memory location by 1.
DEC reg/mem16 FF /1
Decrement the contents of a 16-bit
register or memory location by 1.
DEC reg/mem32 FF /1
Decrement the contents of a 32-bit
register or memory location by 1.
DEC reg/mem64 FF /1
Decrement the contents of a 64-bit
register or memory location by 1.
DEC reg16 48 +rw
Decrement the contents of a 16-bit
register by 1.
DEC reg32 48 +rd
Decrement the contents of a 32-bit
register by 1.
DIV reg/mem8 F6 /6
Perform unsigned division of AX by
the contents of an 8-bit register or
memory location and store the
quotient in AL and the remainder in
AH.
DIV reg/mem16 F7 /6
Perform unsigned division of DX:AX by
the contents of a 16-bit register or
memory location and store the
quotient in AX and the remainder in
DX.