B&B Electronics PCI-1711 - Manual - Manual (Page 91)

Appendix C
– 83 – PCI-1710 series User’s Manual Advantech Co., Ltd.
www.advantech.com
C.7 Control Register - BASE+6
The write-only register BASE+6 and BASE+7 allows users to set an
A/D trigger source and an interrupt source.
Table C-9: Control Register
*: AD16/12 and CAL are only supported for PCI-1716/1716L
SW Software trigger enable bit
1 enable; 0 disable.
PACER Pacer trigger enable bit
1 enable; 0 disable.
EXT External trigger enable bit
1 enable; 0 disable.
Note!
✎ Users cannot enable SW, PACER and EXT concurrently.
GATE External trigger gate function enable bit.
0
Disable
1 Enable
IRQEN Interrupt enable bit.
0
Disable
1 Enable
ONE/FH Interrupt source bit
0
Interrupt when an A/D conversion occurs
1 Interrupt when the FIFO is half full.
CNT0 Counter 0 clock source select bit
0 The clock source of Counter 0 comes from the
internal clock
1 MHz for PCI-1711/1711L/17161716L
100 KHz for PCI-1710/1710L/1710HG/1710HGL
1 The clock source of Counter 0 comes from the
external clocock
maximum up to 10 MHz for PCI-1711/1711L/
17161716L
Write A/D Status Register
Bit # 7 6 5 4 3 2 1 0
BASE + 7 * CAL
BASE + 6 *AD16/12 CNT0 ONE/FH IRQEN GATE EXT PACER SW