Rainbow Electronics ATAR862-8 - Manual (Page 66)

66
ATAR862-8
4589B–4BMCU–02/03
Timer 3 Capture Register The counter content can be read via the capture register. There are two ways to use the
capture register. In modes 1 and 4, it is possible to read the current counter value
directly out of the capture register. In the capture modes 2, 3, 5 and 12, a capture event
like an edge at the Timer 3 input or a signal from Timer 2 stores the current counter
value into the capture register. This counter value can be read from the capture register.
Timer 3 CaPture Register
(T3CP) Byte Read Address: "B"hex - Subaddress: "4"hex
Synchronous Serial
Interface (SSI) SSI Features
– 2- and 3-wire NRZ
– 2-wire multi-chip link mode (MCL), additional internal 2-wire link for multi-
chip
packaging solutions
• With Timer 2:
– Biphase modulation
– Manchester modulation
– Pulse-width demodulation
– Burst modulation
• With Timer 3:
– Pulse-width modulation (PWM)
– FSK modulation
– Biphase demodulation
– Manchester demodulation
– Pulse-width demodulation
– Pulse position Demodulation
SSI Peripheral Configuration The synchronous serial interface (SSI) can be used either for serial communication with
external devices such as EEPROMs, shift registers, display drivers, other microcontrol-
lers, or as a means for generating and capturing on-chip serial streams of data. External
data communication takes place via the Port 4 (BP4),a multi-functional port which can
be software configured by writing the appropriate control word into the P4CR register.
The SSI can be configured in any of the following ways:
1. 2-wire external interface for bi-directional data communication with one data ter-
minal and one shift clock. The SSI uses the Port BP43 as a bi-directional serial
data line (SD) and BP40 as shift clock line (SC).
2. 3-wire external interface for simultaneous input and output of serial data, with a
serial input data terminal (SI), a serial output data terminal (SO) and a shift clock
(SC). The SSI uses BP40 as shift clock (SC), while the serial data input (SI) is
applied to BP43 (configured in P4CR as input!). Serial output data (SO) in this
case is passed through to BP42 (configured in P4CR to T2O) via the Timer 2
output stage (T2M2 configured in mode 6).
High Nibble
First read cycle Bit 7 Bit 6 Bit 5 Bit 4 Reset value: xxxxb
Low Nibble
Second read cycle Bit 3 Bit 2 Bit 15 Bit 0 Reset value: xxxxb